For quite some time I had been thinking about the Memory Architecture of WinCE 5.0 and older kernels. Most striking about it is the per process virtual address space of 32MB. This is quite unique in that it offers protection between processes but allows for all virtual addresses to be unique. This is what allows fast context switch between processes during system call and re-schedule. As all Virtual Addresses are unique one doesn't have to flush L1 cache and TLB during a context switch. Recently when I was reading ARM v6 architecture I saw the FCSE (Fast Context Switch Extension) chapter. It was clear to me in a moment where the origins of 32MB process space limit could be. ARM MMU supports a concept of MVA (Modified Virtual Address) during address translation and this MVA is calculated by combining PID with 0 based virtual addressing scheme. In today's fast moving Embedded Systems world one can see that Computer Architecture and Embedded Systems are very closely related for performance reasons and a good ES designer must be savvy enough to keep track of both these worlds!